Conventionally, there is known a semiconductor package in which a semiconductor device is mounted on a wiring board. FIG. 1 is a cross-sectional view of a part of a conventional semiconductor package 300. Referring to FIG. 1, the semiconductor package 300 includes a semiconductor device 400 and a wiring board 500. The semiconductor device 400 includes a semiconductor chip 410 and connection terminals 420.
The semiconductor chip 410 has a structure in which a semiconductor integrated circuit (not illustrated in the figure) and electrode pads (not illustrated in the figure) are formed on a semiconductor substrate (not illustrated in the figure) formed of a semiconductor material such as silicon. The connection terminals 420 serving as electrodes are formed on the electrode pads. For example, solder bumps may be used as the connection terminals 420.
The wiring board 500 includes an insulation layer 530, wiring layers 540, a solder resist layer 550 and pre-solders 570. In the wiring board 500, the wiring layers 540 are formed on the insulation layer 530, and the solder resist layer 550 having openings 550x is formed over the insulation layer 530 and the wiring layers 540. The pre-solders 570 are formed on portions of the wiring layers 540 exposed in the respective openings 550x. The wiring layers 540 may be formed of, for example, copper (Cu). The insulation layer 530 may be formed of, for example, an epoxy resin or a glass-epoxy, which is an epoxy resin containing a glass fiber cloth.
The connection terminals 420 of the semiconductor device 400 are electrically connected to the pre-solders 570 formed on the wiring layers 540 of the wiring board 500 (for example, refer to Patent Documents 1 and 2).
Patent Document 1: Japanese Laid-Open Patent Application No. 2003-188209
Patent Document 2: Japanese Laid-Open Patent Application No. 2006-324393
If a glass-epoxy is used to form the insulation layer 530, the thermal expansion coefficient of the insulation layer 530 is about 18 ppm/° C. On the other hand, if silicon is used to form the semiconductor substrate of the semiconductor chip 410, the thermal expansion coefficient of the semiconductor chip 410 is about 3 ppm/° C. Accordingly, if a glass-epoxy is used for the insulation layer 530 and silicon is used for the semiconductor substrate of the semiconductor chip 410, there is a large difference in thermal expansion coefficient between the insulation layer 530 and the semiconductor chip 410. Thus, when the semiconductor package 300 is heated, a relatively large stress is generated in joining parts between the connection terminals 420 and the pre-solders 570. Such a stress may cause a problem of cracking in the joining parts.